Stone is a design creation solution which suppports generation of
different aspects of the design from a common design representation.
Currently stone supports generation of verilog Register file data from the register specification.
See generated Verilog File
Stone for Windows
Download for all OS'es
windows System run stone.bat or doubleclick on stone.jar
Currently stone supports generation of verilog Register file data from the register specification.
Feature list for Version 1.0
- Features
-
Register builder
- Multiple output formats
- C++
- Verilog
- Stone generates synthesizable RTL based on register specification
- SystemVerilog
- Bluespec SystemVerilog
- HTML Document
- SystemC
- Synthesizable C
- Verification TestBench
- Firmware Headers
-
Multiple Input Formats
- GUI
- Spreadsheet
- XLS
- CVS
- ODF
- XML
- IP-XACT
- C- Code
- Verilog Code
-
Multiple Licensing scheme
- Free. Best effort , ad based
- Individual
- Corporate
- Different abstraction
- Architect
- Firmware
- Silicon developer
- Verification
- Multiple output formats
-
IP Creator
- Output formats
- Verilog HDL
- SystemC model
- Verification code
- Input format
- GUI+C/Verilog code
- Output formats
-
SOC Builder
- Output formats
- Verilog HDL
- SystemC model
- Verification code
- Input format
- GUI+C/Verilog code
- Output formats
-
Register builder
See generated Verilog File
Downloads
Download for all OS'es
Run
Unix/Linux Systems: run ./stone.shwindows System run stone.bat or doubleclick on stone.jar