Dyumnin Semiconductors: Intern/NCG: Take home coding test.

Test

Given a design specification and Its corresponding Verilog Implementation scrambler.v

1. Write a test specification to verify this design.
2. Using cocotb framework implement any 2 testcases from the specification, of which atleast one test should be a datapath (in to out) test.

How to take the test

• You can use this setup as a starting point for your coding scrambler.tgz
• Once you have finished coding & have run the tests, upload the source code folder to your github repo
• Send a message with the repo link.

Qualifying criteria:

1. Correctness and completeness of the testplan.
2. Error free Python code.
3. Correctness of the testcase implementation.

Time Limit:

The coding portion of this test takes less than an hour for a practitioner in the field. A fresher in the field will require additional time to understand the concepts. You are expected to complete the test within a month from the date you were invited to take the test. In case you need extra time send a message.

In case of any doubts/issues please send a message.

Why this test?

• For a candidate to be successful at Dyumnin semiconductors self learning is a major criteria.
• Verification & CocoTB Framework are normally not a part of the academic coursework at any university.
• This coding test checks whether the applicant, when given references to literature, is capable of learning and using a simple framework to verify a design.

References

This test requires an understanding of

1. Python3
2. cocotb framework, cocotb bus, cocotb coverage
3. Learn Cocotb

FAQ

Answer to some of the frequently asked question can be found in FAQ